2015-08-21 12:57:49 +03:00
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# Kconfig - SPI driver configuration options
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#
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2016-03-17 11:21:49 -07:00
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# Copyright (c) 2015-2016 Intel Corporation
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2015-08-21 12:57:49 +03:00
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#
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2017-01-18 17:01:01 -08:00
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# SPDX-License-Identifier: Apache-2.0
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2015-08-21 12:57:49 +03:00
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#
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#
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# SPI Drivers
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#
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menuconfig SPI
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2017-06-21 09:16:25 +02:00
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bool "SPI hardware bus support"
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2015-08-21 12:57:49 +03:00
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default n
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help
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Enable support for the SPI hardware bus.
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2017-06-21 09:16:25 +02:00
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if SPI
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2016-09-16 15:24:19 +02:00
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2017-06-21 09:16:25 +02:00
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config SPI_LEGACY_API
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bool "Use legacy SPI API (default)"
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default y
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help
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2017-06-21 09:16:25 +02:00
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Driver and user API is the legacy SPI API (spi_legacy.h).
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If unselected, the new API will be used.
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2016-05-07 18:57:14 -04:00
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2016-04-17 05:55:43 +08:00
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config SPI_INIT_PRIORITY
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int "Init priority"
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default 70
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help
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Device driver initialization priority.
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2016-05-07 19:15:28 -04:00
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config SYS_LOG_SPI_LEVEL
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int "SPI Driver Log level"
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depends on SYS_LOG
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default 0
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range 0 4
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2015-08-21 12:57:49 +03:00
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help
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2016-12-15 13:54:17 +01:00
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Sets log level for SPI drivers.
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2018-03-29 17:35:07 +02:00
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Levels are:
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- 0 OFF, do not write
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- 1 ERROR, only write SYS_LOG_ERR
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- 2 WARNING, write SYS_LOG_WRN in addition to previous level
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- 3 INFO, write SYS_LOG_INF in addition to previous levels
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- 4 DEBUG, write SYS_LOG_DBG in addition to previous levels
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2015-08-21 13:01:08 +03:00
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2016-05-24 18:17:13 -05:00
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config SPI_CS_GPIO
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bool "SPI port CS pin is controlled via a GPIO port"
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depends on GPIO && SPI_LEGACY_API
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default n
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2015-11-21 21:28:21 -05:00
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config SPI_0
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bool "SPI port 0"
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default n
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help
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2016-08-17 14:51:18 +05:30
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Enable SPI controller port 0.
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if SPI_0
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config SPI_0_NAME
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string "SPI port 0 device name"
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depends on !HAS_DTS_SPI
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default "SPI_0"
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config SPI_0_IRQ_PRI
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int "Port 0 interrupt priority"
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config SPI_0_DEFAULT_CFG
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hex "Port 0 default configuration"
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default 0x80
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config SPI_0_DEFAULT_BAUD_RATE
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int "Port 0 default baud rate"
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default 500000
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config SPI_0_CS_GPIO_PORT
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string "The GPIO port which is used to control CS"
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depends on SPI_CS_GPIO
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default "GPIO_0"
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config SPI_0_CS_GPIO_PIN
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int "The GPIO PIN which is used to act as a CS pin"
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depends on SPI_CS_GPIO
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default 0
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endif # SPI_0
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config SPI_1
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bool "SPI port 1"
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default n
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help
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Enable SPI controller port 1.
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2017-06-21 09:16:25 +02:00
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if SPI_1
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config SPI_1_NAME
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string "SPI port 1 device name"
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depends on !HAS_DTS_SPI
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default "SPI_1"
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config SPI_1_IRQ_PRI
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int "Port 0 interrupt priority"
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depends on !HAS_DTS_SPI
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config SPI_1_DEFAULT_CFG
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hex "Port 1 default configuration"
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default 0x80
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config SPI_1_DEFAULT_BAUD_RATE
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int "Port 1 default baud rate"
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default 500000
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config SPI_1_CS_GPIO_PORT
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string "The GPIO port which is used to control CS"
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depends on SPI_CS_GPIO
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default "GPIO_0"
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config SPI_1_CS_GPIO_PIN
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int "The GPIO PIN which is used to act as a CS pin"
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depends on SPI_CS_GPIO
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default 0
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2017-06-21 09:16:25 +02:00
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endif # SPI_1
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config SPI_2
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bool "SPI port 2"
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default n
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help
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2016-08-17 14:51:18 +05:30
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Enable SPI controller port 2.
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if SPI_2
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config SPI_2_NAME
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string "SPI port 2 device name"
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depends on !HAS_DTS_SPI
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default "SPI_2"
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config SPI_2_IRQ_PRI
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int "Port 2 interrupt priority"
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depends on !HAS_DTS_SPI
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2016-12-11 12:46:04 -06:00
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config SPI_2_DEFAULT_CFG
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hex "Port 2 default configuration"
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default 0x80
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config SPI_2_DEFAULT_BAUD_RATE
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int "Port 2 default baud rate"
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default 500000
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config SPI_2_CS_GPIO_PORT
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string "The GPIO port which is used to control CS"
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depends on SPI_CS_GPIO
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default "GPIO_0"
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config SPI_2_CS_GPIO_PIN
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int "The GPIO PIN which is used to act as a CS pin"
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depends on SPI_CS_GPIO
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default 0
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2017-06-21 09:16:25 +02:00
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endif # SPI_2
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2016-09-16 15:24:19 +02:00
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config SPI_3
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bool "SPI port 3"
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default n
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help
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Enable SPI controller port 3.
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2017-06-21 09:16:25 +02:00
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if SPI_3
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2016-09-16 15:24:19 +02:00
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config SPI_3_NAME
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string "SPI port 3 device name"
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depends on !HAS_DTS_SPI
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default "SPI_3"
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config SPI_3_IRQ_PRI
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int "Port 3 interrupt priority"
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depends on !HAS_DTS_SPI
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endif # SPI_3
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2016-09-16 15:24:19 +02:00
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2018-01-05 19:54:30 +01:00
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config SPI_4
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bool "SPI port 4"
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default n
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help
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Enable SPI controller port 4.
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config SPI_4_NAME
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string "SPI port 4 device name"
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depends on SPI_4
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default "SPI_4"
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config SPI_5
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bool "SPI port 5"
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default n
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help
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Enable SPI controller port 5.
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config SPI_5_NAME
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string "SPI port 5 device name"
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depends on SPI_5
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default "SPI_5"
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2017-06-21 09:16:25 +02:00
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if SPI_LEGACY_API
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2016-11-30 17:17:16 -08:00
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2017-06-21 09:16:25 +02:00
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config SPI_INTEL
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bool "Intel SPI controller driver"
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depends on CPU_MINUTEIA
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default n
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help
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2017-06-21 09:16:25 +02:00
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Enable support for Intel's SPI controllers. Such controller
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was formerly found on XScale chips. It can be found nowadays
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on CEXXXX Intel media controller and Quark CPU (2 of them).
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2016-11-30 17:17:16 -08:00
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2017-06-21 09:16:25 +02:00
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source "drivers/spi/Kconfig.qmsi"
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2016-11-30 17:17:16 -08:00
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2017-06-21 09:16:25 +02:00
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source "drivers/spi/Kconfig.mcux_dspi"
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2016-11-30 17:17:16 -08:00
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2017-06-21 09:16:25 +02:00
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source "drivers/spi/Kconfig.nrf5_legacy"
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2016-11-30 17:17:16 -08:00
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2017-06-21 09:16:25 +02:00
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endif # SPI_LEGACY_API
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2017-06-21 09:16:25 +02:00
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if !SPI_LEGACY_API
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2017-06-21 09:16:25 +02:00
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source "drivers/spi/Kconfig.stm32"
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2017-06-21 09:16:25 +02:00
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endif # !SPI_LEGACY_API
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2017-06-21 09:16:25 +02:00
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source "drivers/spi/Kconfig.dw"
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2017-03-20 18:28:37 +01:00
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2017-12-17 20:55:45 +01:00
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source "drivers/spi/Kconfig.sam0"
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2016-02-18 14:38:32 -05:00
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endif # SPI
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