2019-04-06 09:08:09 -04:00
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# SPDX-License-Identifier: Apache-2.0
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2015-12-01 08:42:19 -08:00
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menuconfig UART_NS16550
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bool "NS16550 serial driver"
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select SERIAL_HAS_DRIVER
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2017-06-22 11:26:58 -05:00
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select SERIAL_SUPPORT_INTERRUPT
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2015-12-01 08:42:19 -08:00
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help
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This option enables the NS16550 serial driver.
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This driver can be used for the serial hardware
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2016-08-17 16:33:08 -07:00
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available on x86 boards.
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2015-12-01 08:42:19 -08:00
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2020-12-19 17:27:22 +02:00
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if UART_NS16550
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2016-01-06 09:17:03 -08:00
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config UART_NS16550_LINE_CTRL
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2022-03-09 12:05:12 +01:00
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bool "Serial Line Control for Apps"
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2020-12-19 17:27:22 +02:00
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depends on UART_LINE_CTRL
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2016-01-06 09:17:03 -08:00
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help
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This enables the API for apps to control the serial line,
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such as CTS and RTS.
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Says n if not sure.
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config UART_NS16550_DRV_CMD
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2022-03-09 12:05:12 +01:00
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bool "Driver Commands"
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2020-12-19 17:27:22 +02:00
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depends on UART_DRV_CMD
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2016-01-06 09:17:03 -08:00
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help
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This enables the API for apps to send commands to driver.
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Says n if not sure.
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2016-11-15 02:23:45 +00:00
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config UART_NS16750
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2022-03-09 12:05:12 +01:00
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bool "UART 16750 (64-bytes FIFO and auto flow control)"
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2016-11-15 02:23:45 +00:00
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help
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2020-03-03 22:25:52 +02:00
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This enables support for 64-bytes FIFO and automatic hardware
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flow control if UART controller is 16750.
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2016-11-15 02:23:45 +00:00
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2019-05-29 14:58:02 +08:00
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config UART_NS16550_ACCESS_WORD_ONLY
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bool "NS16550 only allows word access"
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help
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In some case, e.g. ARC HS Development kit, the peripheral space of ns
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16550 (DesignWare UART) only allows word access, byte access will raise
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exception.
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2020-12-19 17:27:22 +02:00
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2021-09-27 11:04:55 -07:00
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menu "NS16550 Workarounds"
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config UART_NS16550_WA_ISR_REENABLE_INTERRUPT
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bool "Re-enable interrupts by toggling IER at end of ISR"
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depends on UART_INTERRUPT_DRIVEN
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help
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In some configurations (e.g. edge interrupt triggers),
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an interruptible event occurs during ISR and the host interrupt
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controller does not see the new event due to IIR is constantly
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asserting interrupts. For example, the callback handles RX and
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then TX. If another character comes in before end of TX processing
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(TX interrupt still asserts while raising RX interrupt), the host
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interrupt controller may not see this new event. So if needed,
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the IER is being toggled to re-assert interrupts at the end of ISR
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to nudge the host interrupt controller to fire the ISR again.
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endmenu
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2020-12-19 17:27:22 +02:00
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endif # UART_NS16550
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