2016-10-03 15:51:32 +02:00
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/*
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* Copyright (c) 2016 Open-RnD Sp. z o.o.
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* Copyright (c) 2016 BayLibre, SAS
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*
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2017-01-18 17:01:01 -08:00
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* SPDX-License-Identifier: Apache-2.0
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2016-10-03 15:51:32 +02:00
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*/
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/**
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* @file
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* @brief System/hardware module for STM32L4 processor
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*/
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2016-12-23 08:35:34 -05:00
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#include <kernel.h>
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2016-10-03 15:51:32 +02:00
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#include <device.h>
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#include <init.h>
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#include <soc.h>
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#include <arch/cpu.h>
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2017-01-25 09:12:00 -06:00
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#include <cortex_m/exc.h>
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2016-10-03 15:51:32 +02:00
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2017-02-17 17:07:09 +01:00
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/**
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* @brief This function configures the source of stm32cube time base.
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* Cube HAL expects a 1ms tick which matches with k_uptime_get_32.
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* Tick interrupt priority is not used
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* @return HAL status
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*/
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uint32_t HAL_GetTick(void)
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{
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return k_uptime_get_32();
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}
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2016-10-03 15:51:32 +02:00
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/**
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* @brief Perform basic hardware initialization at boot.
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*
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* This needs to be run from the very beginning.
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* So the init priority has to be 0 (zero).
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*
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* @return 0
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*/
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static int stm32l4_init(struct device *arg)
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{
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2017-04-20 13:30:33 -05:00
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u32_t key;
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2016-10-03 15:51:32 +02:00
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ARG_UNUSED(arg);
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key = irq_lock();
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2017-01-25 09:12:00 -06:00
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_ClearFaults();
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2016-10-03 15:51:32 +02:00
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/* Install default handler that simply resets the CPU
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* if configured in the kernel, NOP otherwise
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*/
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NMI_INIT();
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irq_unlock(key);
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/* Update CMSIS SystemCoreClock variable (HCLK) */
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2017-01-24 11:37:26 +01:00
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/* At reset, System core clock is set to 4MHz */
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SystemCoreClock = 4000000;
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2016-10-03 15:51:32 +02:00
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return 0;
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}
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SYS_INIT(stm32l4_init, PRE_KERNEL_1, 0);
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