142 lines
3.3 KiB
C
142 lines
3.3 KiB
C
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/*
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* Copyright (c) 2021 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_LIB_HELPERS_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_LIB_HELPERS_H_
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#ifndef _ASMLANGUAGE
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#include <arch/arm/aarch64/cpu.h>
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#include <stdint.h>
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/* All the macros need a memory clobber */
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#define read_sysreg(reg) \
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({ \
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uint64_t val; \
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__asm__ volatile ("mrs %0, " STRINGIFY(reg) \
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: "=r" (val) :: "memory"); \
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val; \
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})
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#define write_sysreg(val, reg) \
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({ \
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__asm__ volatile ("msr " STRINGIFY(reg) ", %0" \
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:: "r" (val) : "memory"); \
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})
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#define zero_sysreg(reg) \
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({ \
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__asm__ volatile ("msr " STRINGIFY(reg) ", xzr" \
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::: "memory"); \
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})
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#define MAKE_REG_HELPER(reg) \
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static ALWAYS_INLINE uint64_t read_##reg(void) \
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{ \
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return read_sysreg(reg); \
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} \
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static ALWAYS_INLINE void write_##reg(uint64_t val) \
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{ \
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write_sysreg(val, reg); \
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} \
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static ALWAYS_INLINE void zero_##reg(void) \
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{ \
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zero_sysreg(reg); \
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}
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#define MAKE_REG_HELPER_EL123(reg) \
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MAKE_REG_HELPER(reg##_el1) \
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MAKE_REG_HELPER(reg##_el2) \
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MAKE_REG_HELPER(reg##_el3)
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MAKE_REG_HELPER(cntfrq_el0);
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MAKE_REG_HELPER(cnthctl_el2);
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MAKE_REG_HELPER(cnthp_ctl_el2);
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MAKE_REG_HELPER(cntv_ctl_el0)
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MAKE_REG_HELPER(cntv_cval_el0)
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MAKE_REG_HELPER(cntvct_el0);
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MAKE_REG_HELPER(cntvoff_el2);
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MAKE_REG_HELPER(currentel);
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MAKE_REG_HELPER(daif)
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MAKE_REG_HELPER(hcr_el2);
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MAKE_REG_HELPER(id_aa64pfr0_el1);
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MAKE_REG_HELPER(scr_el3);
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MAKE_REG_HELPER_EL123(actlr)
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MAKE_REG_HELPER_EL123(cpacr)
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MAKE_REG_HELPER_EL123(cptr)
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MAKE_REG_HELPER_EL123(elr)
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MAKE_REG_HELPER_EL123(esr)
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MAKE_REG_HELPER_EL123(far)
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MAKE_REG_HELPER_EL123(mair)
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MAKE_REG_HELPER_EL123(sctlr)
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MAKE_REG_HELPER_EL123(spsr)
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MAKE_REG_HELPER_EL123(tcr)
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MAKE_REG_HELPER_EL123(ttbr0)
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MAKE_REG_HELPER_EL123(vbar)
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static ALWAYS_INLINE void enable_debug_exceptions(void)
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{
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__asm__ volatile ("msr DAIFClr, %0"
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:: "i" (DAIFCLR_DBG_BIT) : "memory");
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}
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static ALWAYS_INLINE void disable_debug_exceptions(void)
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{
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__asm__ volatile ("msr DAIFSet, %0"
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:: "i" (DAIFSET_DBG_BIT) : "memory");
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}
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static ALWAYS_INLINE void enable_serror_exceptions(void)
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{
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__asm__ volatile ("msr DAIFClr, %0"
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:: "i" (DAIFCLR_ABT_BIT) : "memory");
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}
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static ALWAYS_INLINE void disable_serror_exceptions(void)
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{
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__asm__ volatile ("msr DAIFSet, %0"
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:: "i" (DAIFSET_ABT_BIT) : "memory");
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}
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static ALWAYS_INLINE void enable_irq(void)
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{
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__asm__ volatile ("msr DAIFClr, %0"
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:: "i" (DAIFCLR_IRQ_BIT) : "memory");
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}
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static ALWAYS_INLINE void disable_irq(void)
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{
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__asm__ volatile ("msr DAIFSet, %0"
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:: "i" (DAIFSET_IRQ_BIT) : "memory");
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}
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static ALWAYS_INLINE void enable_fiq(void)
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{
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__asm__ volatile ("msr DAIFClr, %0"
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:: "i" (DAIFCLR_FIQ_BIT) : "memory");
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}
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static ALWAYS_INLINE void disable_fiq(void)
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{
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__asm__ volatile ("msr DAIFSet, %0"
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:: "i" (DAIFSET_FIQ_BIT) : "memory");
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}
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#define dsb() __asm__ volatile ("dsb sy" ::: "memory")
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#define dmb() __asm__ volatile ("dmb sy" ::: "memory")
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#define isb() __asm__ volatile ("isb" ::: "memory")
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/* Zephyr needs these as well */
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#define __ISB() isb()
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#define __DMB() dmb()
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#define __DSB() dsb()
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#endif /* !_ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_LIB_HELPERS_H_ */
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