2022-09-07 13:43:04 -05:00
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/*
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* Copyright 2022, NXP
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/init.h>
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#include "fsl_power.h"
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2022-10-12 12:56:52 -05:00
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#include <zephyr/pm/policy.h>
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2022-09-07 13:43:04 -05:00
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2022-11-29 16:13:21 -06:00
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#if CONFIG_REGULATOR
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#include <zephyr/drivers/regulator.h>
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#define NODE_SW1 DT_NODELABEL(pca9420_sw1)
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#define NODE_SW2 DT_NODELABEL(pca9420_sw2)
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#define NODE_LDO1 DT_NODELABEL(pca9420_ldo1)
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#define NODE_LDO2 DT_NODELABEL(pca9420_ldo2)
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static const struct device *sw1 = DEVICE_DT_GET(NODE_SW1);
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static const struct device *sw2 = DEVICE_DT_GET(NODE_SW2);
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static const struct device *ldo1 = DEVICE_DT_GET(NODE_LDO1);
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static const struct device *ldo2 = DEVICE_DT_GET(NODE_LDO2);
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/* System clock frequency. */
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extern uint32_t SystemCoreClock;
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static const int32_t sw1_volt[] = {1100000, 1000000, 900000, 800000, 700000};
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static int32_t board_calc_volt_level(void)
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{
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uint32_t i;
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uint32_t volt;
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for (i = 0U; i < POWER_FREQ_LEVELS_NUM; i++) {
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if (SystemCoreClock > powerFreqLevel[i]) {
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break;
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}
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}
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/* Frequency exceed max supported */
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if (i == 0U) {
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volt = POWER_INVALID_VOLT_LEVEL;
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} else {
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volt = sw1_volt[i - 1U];
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}
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return volt;
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}
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static int board_config_pmic(const struct device *dev)
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{
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uint32_t volt;
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int ret = 0;
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volt = board_calc_volt_level();
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ret = regulator_set_voltage(sw1, volt, volt);
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if (ret != 0) {
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return ret;
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}
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ret = regulator_set_voltage(sw2, 1800000, 1800000);
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if (ret != 0) {
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return ret;
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}
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ret = regulator_set_voltage(ldo1, 1800000, 1800000);
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if (ret != 0) {
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return ret;
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}
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ret = regulator_set_voltage(ldo2, 3300000, 3300000);
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if (ret != 0) {
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return ret;
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}
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2022-10-12 12:56:52 -05:00
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/* We can enter deep low power modes */
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pm_policy_state_lock_put(PM_STATE_SUSPEND_TO_IDLE, PM_ALL_SUBSTATES);
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2022-11-29 16:13:21 -06:00
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return ret;
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}
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#endif
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2022-09-07 13:43:04 -05:00
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static int mimxrt595_evk_init(const struct device *dev)
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{
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/* Set the correct voltage range according to the board. */
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power_pad_vrange_t vrange = {
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.Vdde0Range = kPadVol_171_198,
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.Vdde1Range = kPadVol_171_198,
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.Vdde2Range = kPadVol_171_198,
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.Vdde3Range = kPadVol_300_360,
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.Vdde4Range = kPadVol_171_198
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};
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POWER_SetPadVolRange(&vrange);
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2022-10-12 12:56:52 -05:00
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/* Do not enter deep low power modes until the PMIC modes have been initialized */
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pm_policy_state_lock_get(PM_STATE_SUSPEND_TO_IDLE, PM_ALL_SUBSTATES);
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2022-09-07 13:43:04 -05:00
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return 0;
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}
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2022-11-29 16:13:21 -06:00
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#if CONFIG_REGULATOR
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/* PMIC setup is dependent on the regulator API */
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SYS_INIT(board_config_pmic, POST_KERNEL, CONFIG_APPLICATION_INIT_PRIORITY);
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#endif
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2022-09-07 13:43:04 -05:00
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SYS_INIT(mimxrt595_evk_init, PRE_KERNEL_1, CONFIG_BOARD_INIT_PRIORITY);
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