2019-04-01 18:10:44 -04:00
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/*
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* Copyright (c) 2019 Microchip Technology Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* This file is a temporary workaround for mapping of the generated information
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* to the current driver definitions. This will be removed when the drivers
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* are modified to handle the generated information, or the mapping of
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* generated data matches the driver definitions.
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*/
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#define DT_NUM_IRQ_PRIO_BITS \
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DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define DT_NS16550_REG_SHIFT \
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DT_NS16550_400F2400_REG_SHIFT
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#define DT_UART_NS16550_PORT_0_BASE_ADDR \
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DT_NS16550_400F2400_BASE_ADDRESS
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#define DT_UART_NS16550_PORT_0_CLK_FREQ 1843200
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#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_400F2400_LABEL
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#define DT_UART_NS16550_PORT_0_BAUD_RATE \
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DT_NS16550_400F2400_CURRENT_SPEED
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#define DT_UART_NS16550_PORT_0_IRQ DT_NS16550_400F2400_IRQ_0
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2019-06-11 14:20:32 -05:00
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#define DT_UART_NS16550_PORT_0_IRQ_PRI DT_INST_0_NS16550_IRQ_0_PRIORITY
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2019-04-01 18:10:44 -04:00
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#define DT_UART_NS16550_PORT_0_IRQ_FLAGS 0 /* Deault */
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#define DT_UART_NS16550_PORT_1_BASE_ADDR \
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DT_NS16550_400F2800_BASE_ADDRESS
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#define DT_UART_NS16550_PORT_1_CLK_FREQ 1843200
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#define DT_UART_NS16550_PORT_1_NAME DT_NS16550_400F2800_LABEL
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#define DT_UART_NS16550_PORT_1_BAUD_RATE \
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DT_NS16550_400F2800_CURRENT_SPEED
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#define DT_UART_NS16550_PORT_1_IRQ DT_NS16550_400F2800_IRQ_0
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2019-06-11 14:20:32 -05:00
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#define DT_UART_NS16550_PORT_1_IRQ_PRI DT_INST_1_NS16550_IRQ_0_PRIORITY
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2019-04-01 18:10:44 -04:00
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#define DT_UART_NS16550_PORT_1_IRQ_FLAGS 0 /* Default */
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#define DT_UART_NS16550_PORT_2_BASE_ADDR \
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DT_NS16550_400F2C00_BASE_ADDRESS
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#define DT_UART_NS16550_PORT_2_CLK_FREQ 1843200
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#define DT_UART_NS16550_PORT_2_NAME DT_NS16550_400F2C00_LABEL
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#define DT_UART_NS16550_PORT_2_BAUD_RATE \
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DT_NS16550_400F2C00_CURRENT_SPEED
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#define DT_UART_NS16550_PORT_2_IRQ DT_NS16550_400F2C00_IRQ_0
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2019-06-11 14:20:32 -05:00
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#define DT_UART_NS16550_PORT_2_IRQ_PRI DT_INST_2_NS16550_IRQ_0_PRIORITY
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2019-04-01 18:10:44 -04:00
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#define DT_UART_NS16550_PORT_2_IRQ_FLAGS 0 /* Default */
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2019-04-10 01:45:16 -07:00
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2019-05-15 01:56:49 -07:00
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/* Pin multiplexing and GPIOs share the same registers in the HW */
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2019-06-11 14:20:32 -05:00
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#define DT_PINMUX_XEC_GPIO000_036_BASE_ADDR DT_INST_0_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_PINMUX_XEC_GPIO040_076_BASE_ADDR DT_INST_1_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_PINMUX_XEC_GPIO100_136_BASE_ADDR DT_INST_2_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_PINMUX_XEC_GPIO140_176_BASE_ADDR DT_INST_3_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_PINMUX_XEC_GPIO200_236_BASE_ADDR DT_INST_4_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_PINMUX_XEC_GPIO240_276_BASE_ADDR DT_INST_5_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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2019-05-15 01:56:49 -07:00
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2019-06-11 14:20:32 -05:00
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#define DT_GPIO_XEC_GPIO000_036_BASE_ADDR DT_INST_0_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_GPIO_XEC_GPIO000_036_IRQ DT_INST_0_MICROCHIP_XEC_GPIO_IRQ_0
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#define DT_GPIO_XEC_GPIO000_036_IRQ_PRIORITY DT_INST_0_MICROCHIP_XEC_GPIO_IRQ_0_PRIORITY
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#define DT_GPIO_XEC_GPIO000_036_LABEL DT_INST_0_MICROCHIP_XEC_GPIO_LABEL
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#define DT_GPIO_XEC_GPIO000_036_SIZE DT_INST_0_MICROCHIP_XEC_GPIO_SIZE
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2019-04-10 01:45:16 -07:00
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2019-06-11 14:20:32 -05:00
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#define DT_GPIO_XEC_GPIO040_076_BASE_ADDR DT_INST_1_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_GPIO_XEC_GPIO040_076_IRQ DT_INST_1_MICROCHIP_XEC_GPIO_IRQ_0
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#define DT_GPIO_XEC_GPIO040_076_IRQ_PRIORITY DT_INST_1_MICROCHIP_XEC_GPIO_IRQ_0_PRIORITY
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#define DT_GPIO_XEC_GPIO040_076_LABEL DT_INST_1_MICROCHIP_XEC_GPIO_LABEL
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#define DT_GPIO_XEC_GPIO040_076_SIZE DT_INST_1_MICROCHIP_XEC_GPIO_SIZE
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2019-04-10 01:45:16 -07:00
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2019-06-11 14:20:32 -05:00
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#define DT_GPIO_XEC_GPIO100_136_BASE_ADDR DT_INST_2_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_GPIO_XEC_GPIO100_136_IRQ DT_INST_2_MICROCHIP_XEC_GPIO_IRQ_0
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#define DT_GPIO_XEC_GPIO100_136_IRQ_PRIORITY DT_INST_2_MICROCHIP_XEC_GPIO_IRQ_0_PRIORITY
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#define DT_GPIO_XEC_GPIO100_136_LABEL DT_INST_2_MICROCHIP_XEC_GPIO_LABEL
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#define DT_GPIO_XEC_GPIO100_136_SIZE DT_INST_2_MICROCHIP_XEC_GPIO_SIZE
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2019-04-10 01:45:16 -07:00
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2019-06-11 14:20:32 -05:00
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#define DT_GPIO_XEC_GPIO140_176_BASE_ADDR DT_INST_3_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_GPIO_XEC_GPIO140_176_IRQ DT_INST_3_MICROCHIP_XEC_GPIO_IRQ_0
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#define DT_GPIO_XEC_GPIO140_176_IRQ_PRIORITY DT_INST_3_MICROCHIP_XEC_GPIO_IRQ_0_PRIORITY
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#define DT_GPIO_XEC_GPIO140_176_LABEL DT_INST_3_MICROCHIP_XEC_GPIO_LABEL
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#define DT_GPIO_XEC_GPIO140_176_SIZE DT_INST_3_MICROCHIP_XEC_GPIO_SIZE
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2019-04-10 01:45:16 -07:00
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2019-06-11 14:20:32 -05:00
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#define DT_GPIO_XEC_GPIO200_236_BASE_ADDR DT_INST_4_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_GPIO_XEC_GPIO200_236_IRQ DT_INST_4_MICROCHIP_XEC_GPIO_IRQ_0
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#define DT_GPIO_XEC_GPIO200_236_IRQ_PRIORITY DT_INST_4_MICROCHIP_XEC_GPIO_IRQ_0_PRIORITY
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#define DT_GPIO_XEC_GPIO200_236_LABEL DT_INST_4_MICROCHIP_XEC_GPIO_LABEL
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#define DT_GPIO_XEC_GPIO200_236_SIZE DT_INST_4_MICROCHIP_XEC_GPIO_SIZE
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2019-04-10 01:45:16 -07:00
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2019-06-11 14:20:32 -05:00
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#define DT_GPIO_XEC_GPIO240_276_BASE_ADDR DT_INST_5_MICROCHIP_XEC_GPIO_BASE_ADDRESS
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#define DT_GPIO_XEC_GPIO240_276_IRQ DT_INST_5_MICROCHIP_XEC_GPIO_IRQ_0
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#define DT_GPIO_XEC_GPIO240_276_IRQ_PRIORITY DT_INST_5_MICROCHIP_XEC_GPIO_IRQ_0_PRIORITY
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#define DT_GPIO_XEC_GPIO240_276_LABEL DT_INST_5_MICROCHIP_XEC_GPIO_LABEL
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#define DT_GPIO_XEC_GPIO240_276_SIZE DT_INST_5_MICROCHIP_XEC_GPIO_SIZE
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