zephyr/soc/riscv32/riscv-privilege/miv/linker.ld

/*
 * Copyright (c) 2018 Antmicro <www.antmicro.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <arch/riscv32/common/linker.ld>
riscv32: riscv-privilege: Microsemi Mi-V support This commit adds support for Microsemi Mi-V RISC-V softcore CPU running on the M2GL025 IGLOO2 FPGA development board. signed-off-by: Karol Gugala <kgugala@antmicro.com> 2018-06-10 19:02:14 +02:00			`/*`
			`* Copyright (c) 2018 Antmicro <www.antmicro.com>`
			`*`
			`* SPDX-License-Identifier: Apache-2.0`
			`*/`

			`#include <arch/riscv32/common/linker.ld>`