zephyr/arch/arm/soc/st_stm32/stm32f1/dts.fixup

/* SoC level DTS fixup file */

#define CONFIG_NUM_IRQ_PRIO_BITS                ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS

#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS   ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE      ST_STM32_USART_40013800_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI        ST_STM32_USART_40013800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_1_NAME           ST_STM32_USART_40013800_LABEL
#define PORT_1_IRQ                              ST_STM32_USART_40013800_IRQ_0

#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS   ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE      ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI        ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_2_NAME           ST_STM32_USART_40004400_LABEL
#define PORT_2_IRQ                              ST_STM32_USART_40004400_IRQ_0

#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS   ST_STM32_USART_40004800_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_3_BAUD_RATE      ST_STM32_USART_40004800_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_3_IRQ_PRI        ST_STM32_USART_40004800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_3_NAME           ST_STM32_USART_40004800_LABEL
#define PORT_3_IRQ                              ST_STM32_USART_40004800_IRQ_0

#define CONFIG_I2C_2_BASE_ADDRESS               ST_STM32_I2C_V1_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI              ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_2_ERROR_IRQ_PRI              ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_2_NAME                       ST_STM32_I2C_V1_40005800_LABEL
#define CONFIG_I2C_2_EVENT_IRQ                  ST_STM32_I2C_V1_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ                  ST_STM32_I2C_V1_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE                    ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY

#define CONFIG_SPI_1_BASE_ADDRESS		ST_STM32_SPI_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI			ST_STM32_SPI_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME			ST_STM32_SPI_40013000_LABEL
#define CONFIG_SPI_1_IRQ			ST_STM32_SPI_40013000_IRQ_0

#define CONFIG_SPI_2_BASE_ADDRESS		ST_STM32_SPI_40003800_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ_PRI			ST_STM32_SPI_40003800_IRQ_0_PRIORITY
#define CONFIG_SPI_2_NAME			ST_STM32_SPI_40003800_LABEL
#define CONFIG_SPI_2_IRQ			ST_STM32_SPI_40003800_IRQ_0

#define CONFIG_SPI_3_BASE_ADDRESS		ST_STM32_SPI_40003C00_BASE_ADDRESS
#define CONFIG_SPI_3_IRQ_PRI			ST_STM32_SPI_40003C00_IRQ_0_PRIORITY
#define CONFIG_SPI_3_NAME			ST_STM32_SPI_40003C00_LABEL
#define CONFIG_SPI_3_IRQ			ST_STM32_SPI_40003C00_IRQ_0

/* End of SoC Level DTS fixup file */