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kconfig: Clean up header comments and make them consistent Use this short header style in all Kconfig files: # <description> # <copyright> # <license> ... Also change all <description>s from # Kconfig[.extension] - Foo-related options to just # Foo-related options It's clear enough that it's about Kconfig. The <description> cleanup was done with this command, along with some manual cleanup (big letter at the start, etc.) git ls-files '*Kconfig*' | \ xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /' Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 13:45:29 +01:00
# Counter configuration options
API: Add public counter API Add the public API for counter devices and the drivers infrastructure. Origin: Original Change-Id: If100fbc9b3d119ce2be6c131bd64dbeb4fe346f2 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-02-22 17:10:56 -08:00
# Copyright (c) 2016 Intel Corporation
license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-18 17:01:01 -08:00
# SPDX-License-Identifier: Apache-2.0
API: Add public counter API Add the public API for counter devices and the drivers infrastructure. Origin: Original Change-Id: If100fbc9b3d119ce2be6c131bd64dbeb4fe346f2 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-02-22 17:10:56 -08:00
menuconfig COUNTER
drivers: kconfig: unify menuconfig title strings Unify the drivers/*/Kconfig menuconfig title strings to the format "<class> [(acronym)] [bus] drivers". Including both the full name of the driver class and an acronym makes menuconfig more user friendly as some of the acronyms are less well-known than others. It also improves Kconfig search, both via menuconfig and via the generated Kconfig documentation. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-27 14:55:23 +02:00
bool "Counter drivers"
API: Add public counter API Add the public API for counter devices and the drivers infrastructure. Origin: Original Change-Id: If100fbc9b3d119ce2be6c131bd64dbeb4fe346f2 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-02-22 17:10:56 -08:00
help
Enable support for counter and timer.
drivers: Quark AON counter and timer support Quark AON counter and timer sub-drivers. They are based on the QMSI drivers. In order to enable this driver, the following options must be set. CONFIG_QMSI_DRIVERS CONFIG_QMSI_INSTALL_PATH CONFIG_COUNTER Origin: Original Change-Id: Idbeabfaef3408f4d645b0e64a337d7f5f0f357c7 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-03-09 12:00:40 -08:00
counter: Refactor main Kconfig file This patch refactors the main Kconfig file in order to align it with the Zephyr code style and to make sure that each Kconfig configuration portion is easily identifiable. Change-Id: Iba83be8ae154df4b29ff423b4c3cc97a78c93e00 Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2016-11-29 14:33:36 +00:00
if COUNTER
drivers: Quark AON counter and timer support Quark AON counter and timer sub-drivers. They are based on the QMSI drivers. In order to enable this driver, the following options must be set. CONFIG_QMSI_DRIVERS CONFIG_QMSI_INSTALL_PATH CONFIG_COUNTER Origin: Original Change-Id: Idbeabfaef3408f4d645b0e64a337d7f5f0f357c7 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-03-09 12:00:40 -08:00
drivers: counter: Refactor drivers to use shared init priority Refactors all of the counter drivers to use a shared driver class initialization priority configuration, CONFIG_COUNTER_INIT_PRIORITY, to allow configuring counter drivers separately from other devices. This is similar to other driver classes like I2C and SPI. The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the existing default initialization priority for most drivers. The exceptions are the maxim_ds3231 and mcp7940n drivers which have a dependency on a SPI driver and must therefore initialize later than the default device priority. Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-10-20 15:15:14 -05:00
config COUNTER_INIT_PRIORITY
int "Counter init priority"
drivers: counter: increase COUNTER_INIT_PRIORITY Some counter devices depend on buses (e.g. I2C for Maxim DS3231). Bus devices are tipically initialized with KERNEL_INIT_PRIORITY_DEVICE as well, so there's no guarantee counter will be initialized be initialized before without manually tweaking priorities. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 15:53:36 +02:00
default 60
drivers: counter: Refactor drivers to use shared init priority Refactors all of the counter drivers to use a shared driver class initialization priority configuration, CONFIG_COUNTER_INIT_PRIORITY, to allow configuring counter drivers separately from other devices. This is similar to other driver classes like I2C and SPI. The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the existing default initialization priority for most drivers. The exceptions are the maxim_ds3231 and mcp7940n drivers which have a dependency on a SPI driver and must therefore initialize later than the default device priority. Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-10-20 15:15:14 -05:00
help
Counter driver device initialization priority.
drivers: counter: Add shell commands for timer add shell implementation for timer Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2023-07-18 14:06:39 +00:00
config COUNTER_SHELL
bool "Counter shell"
depends on SHELL
help
Enable Shell Commands for Counter and Timer
drivers: Define COUNTER_LOG_LEVEL using template This commit updates counter Kconfig to use logger template to define COUNTER_LOG_LEVEL option. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-06-11 09:52:36 +02:00
module = COUNTER
module-str = counter
source "subsys/logging/Kconfig.template.log_config"
drivers: counter: Counter API implementation for nRF Series (TIMER). Shim for counter API using nrfx_timer driver. Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2018-06-11 11:50:20 +02:00
drivers: counter: Add Ambiq counter driver This commit adds Ambiq counter driver for Apollo4p SoCs. Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com> Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
2023-08-04 14:47:07 +02:00
source "drivers/counter/Kconfig.ambiq"
drivers: Add counter driver (RTCC) for SiLabs Gecko SoCs This commit adds counter driver based on RTCC module for SiLabs Gecko SoCs. Tested with SLWSTK6061A / BRD4250B wireless starter kit. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-05-17 09:20:17 +02:00
source "drivers/counter/Kconfig.gecko"
counter: cmsdk: Add Timer 0 and 1 as Counters This patch adds Timer 0 and 1 to be used as counters. Jira: ZEP-1300 Change-Id: I9d8b971d8a3d76eee2f9cc4600e95729d67717a3 Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2016-11-29 17:14:01 +00:00
source "drivers/counter/Kconfig.tmr_cmsdk_apb"
counter: cmsdk: Add DualTimer as Counter This patch adds Dualtimer to be used as a counter. Jira: ZEP-1300 Change-Id: Ic4a2d89ec7fc0c0c2a0bc7f6d32d97637049faaf Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2016-12-13 11:53:08 +00:00
source "drivers/counter/Kconfig.dtmr_cmsdk_apb"
drivers: counter: Introduce mcux rtc shim Adds a shim layer around the mcux rtc driver to adapt it to the zephyr counter interface. Portions of this driver are reused from the existing rtc driver in drivers/rtc/rtc_mcux.c. The hardware supports a single alarm only and a fixed wrap value. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-10-16 18:45:19 -05:00
source "drivers/counter/Kconfig.mcux_rtc"
drivers: counter: Add counter for rt600 Add a RTC based counter for MXRT600 Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-05-13 16:14:36 -05:00
source "drivers/counter/Kconfig.mcux_lpc_rtc"
drivers: counter: Counter API implementation for nRF Series (TIMER). Shim for counter API using nrfx_timer driver. Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2018-06-11 11:50:20 +02:00
source "drivers/counter/Kconfig.nrfx"
imx: Add IMX EPIT driver for i.MX socs Add shim driver for i.MX EPIT (Enhanced Periodic Interrupt Timer) peripheral which can be used for i.MX6SoloX, i.MX7D and other i.MX socs. Origin: Original Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-11-16 16:34:48 +01:00
source "drivers/counter/Kconfig.imx_epit"
drivers: counter: Counter API implementation for nRF Series (TIMER). Shim for counter API using nrfx_timer driver. Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2018-06-11 11:50:20 +02:00
drivers/counter: implement it51xxx counter driver Implement counter driver for ITE it51xxx series chip. Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2025-05-21 17:52:45 +08:00
source "drivers/counter/Kconfig.ite_it51xxx"
drivers: counter: add ite it8xxx2 timer driver The IT8xxx2 timer driver uses timer 7 and timer 8 to implement the alarm timer and the top timer, respectively. Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
2025-03-20 15:39:30 +08:00
source "drivers/counter/Kconfig.ite_it8xxx2"
drivers/counter: stm32: Provide STM32 RTC driver using counter API Provides a STM32 RTC driver using new counter API. Driver does not support wrap related functions (set, get, ..) Fixes #11373 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-29 11:08:41 +01:00
source "drivers/counter/Kconfig.stm32_rtc"
drivers: counter: Counter API implementation for STM32F4 Series (TIMER). - Shim for counter API using LL_TIM driver. - Supports all general-purpose (TIMx) timers. Signed-off-by: Kent Hall <kjh2166@columbia.edu>
2021-10-06 11:55:26 -04:00
source "drivers/counter/Kconfig.stm32_timer"
drivers: Add Atmel SAM counter (TC) Driver Add basic counter driver based on Timer Counter (TC) module for Atmel SAM family. Remarks: - The driver is not thread safe. - The driver does not implement guard periods. - The driver does not guarantee that short relative alarm will trigger the interrupt immediately and not after the full cycle / counter overflow. Tested on Atmel SMART SAM E70 Xplained board Origin: Original Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-04-25 22:48:30 +02:00
source "drivers/counter/Kconfig.sam"
drivers: counter: Add SAM0 basic counter support This adds support for the basic timer counter (TC) found on SAM0 series parts. This driver only supports running the counter in 32 bit wide mode. Since this mode explicitly slaves the odd counters to the even ones, only instances of the even ones are defined. Tested with tests/drivers/counter/counter_basic_api on SAMD21. Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-04-01 19:15:03 -06:00
source "drivers/counter/Kconfig.sam0"
drivers: ace_v1x wallclock driver Wallclock driver with functionality required by ACE v1x base firmware. Signed-off-by: Piotr Kmiecik <piotrx.kmiecik@intel.com>
2022-08-17 12:57:01 +02:00
source "drivers/counter/Kconfig.ace"
drivers/counter/counter_cmos.c: implement counter with PC AT "CMOS" RTC Enable use of the PC/AT "CMOS" RTC as a simple 1Hz counter. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-13 17:50:05 -07:00
source "drivers/counter/Kconfig.cmos"
drivers: counter: Add NXP MCUX GPT counter driver Add driver for General Purpose Timer module which can act as a counter. Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-03-21 15:48:45 +01:00
source "drivers/counter/Kconfig.mcux_gpt"
drivers: counter: add driver for NXP QTMR counters The driver is implemented using the MCUXpresso SDK. Signed-off-by: Jan Peters <peters@kt-elektronik.de>
2022-04-29 10:25:12 +02:00
source "drivers/counter/Kconfig.mcux_qtmr"
drivers: counter: NXP SNVS rtc: Add support for NXP imx SNVS RTC Adds a driver using the SNVS high power and optionally low power RTC instances. A device specific function `mcux_snvs_rtc_set` is provided to update the current counter value. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-11-15 11:00:07 +01:00
source "drivers/counter/Kconfig.mcux_snvs"
drivers: counter: mcux: add support for TPM Add TPM native Zephyr driver. It's mainly inspired from the GPT counter implementation. Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2023-05-16 18:21:07 +02:00
source "drivers/counter/Kconfig.mcux_tpm"
driver/counter: Add support for Microchip's XEC basic timer devices Such basic timer is found on MEC150x for instance. Since instances have dedicated data, let's define specifice instance based on unique DT base address definition. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com> Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-06-07 15:16:47 +02:00
source "drivers/counter/Kconfig.xec"
drivers: counter: add NXP Kinetis LPTMR driver Add counter driver for the NXP Kinetis Low Power Timer (LPTMR). The driver can be configured either as 16 bit counter or 16 bit pulse counter. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-02-04 20:04:02 +01:00
source "drivers/counter/Kconfig.mcux_lptmr"
drivers: counter: add Maxim DS3231 support The DS3231 is an I2C real-time clock with internal temperature compensated oscillator, maintaining civil time to 1 s precision with nominal 2 ppm accuracy from 0-40 Cel. The basic functionality is exposed as a counter that is always running at 1 Hz. Much more functionality is exposed as driver-specific API, including the ability to translate between the time scale of the DS3231 and the time scale of the Zephyr uptime clock. This allows correlation of events in the system clock to UTC, TAI, or whatever time scale is used to maintain the DS3231. Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2019-06-23 20:03:52 -05:00
source "drivers/counter/Kconfig.maxim_ds3231"
drivers/counter/counter_native_sim: Rename from counter_native_posix Including renaming the DTS binding and kconfig options deprecating the old one. Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-03-03 13:23:17 +01:00
source "drivers/counter/Kconfig.native_sim"
drivers: counter: Add native_posix counter hardware model and driver Adds native_posix hw counter model and the counter driver. Functionality is needed by software which is tested on native_posix and has dependency on counter. Hardware model was developed similarly to HW timer model. The counter driver wraps HW counter functions and exposes basic functionalities: starting, stopping, setting and cancelling single channel alarms. Code was tested against: tests/drivers/counter/counter_basic_api. Signed-off-by: Filip Zajdel <filip.zajdel@nordicsemi.no>
2020-07-21 16:34:03 +02:00
dts: bindings: renamed binding used for pit Renamed pit binding from nxp,kinetis-pit to nxp,pit Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-02-01 16:12:06 -06:00
source "drivers/counter/Kconfig.nxp_pit"
counter: add pit counter driver add Kinetis PIT as counter driver Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2020-07-07 22:04:53 +08:00
drivers: counter: add driver for the Xilinx AXI Timer Add counter driver for the Xilinx AXI Timer v2.0 IP. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-10-12 15:43:47 +02:00
source "drivers/counter/Kconfig.xlnx"
esp32: drivers: counter: update build references Updates build references of the Counter API implementation based on Espressif's General Purpose Timers to differentiate from the one based on RTC. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-08-03 10:15:35 -03:00
source "drivers/counter/Kconfig.esp32_tmr"
esp32: drivers: counter: add support for general-purpose counters Adds support for ESP32 general-purpose Counters Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-02-15 16:40:38 -03:00
esp32: driver: counter: add RTC-based implementation add RTC-based implementation of the counter driver. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-07-07 16:11:12 -03:00
source "drivers/counter/Kconfig.esp32_rtc"
drivers: counter: Add Smartbond basic support This adds support for the TIMER1-4 counter. Each counter has 24bits and can run on LP_CLK (15-32KHz) or DIVN clock (32MHz) with prescaler 1-32. Each counter can have one alarm set. Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
2022-12-21 12:56:59 +01:00
source "drivers/counter/Kconfig.smartbond_timer"
drivers: counter: add driver for Microchip MCP7940N RTCC Microchip MCP7940N is a Real-Time Clock/Calendar. It operates on a I2C bus. It can be used to set a calendar time and has two alarm channels. When an alarm is asserted the state of the MPF pin of the MCP7940N will change (depending on gpio active high/active low setting) to trigger an interrupt. Signed-off-by: Kieran Mackey <kieran.mackey@lairdconnect.com>
2021-05-20 11:29:15 +01:00
source "drivers/counter/Kconfig.mcp7940n"
drivers: counter: added ctimer driver for lpcexpresso55s69 Added shim driver for the CTIMERs for the lpcexpresso55s69 board. Fixes: #22705 Signed-off-by: Toby Firth <tobyjfirth@gmail.com>
2021-08-10 17:04:20 +01:00
source "drivers/counter/Kconfig.mcux_ctimer"
drivers: counter: Add Infineon CAT1 counter driver Add initial version of Infineon CAT1 counter driver Add initial version of binding file for Infineon Add counters to psco6 dtsi Add external trigger pin that runs counter Signed-off-by: Pavlo Havrylyuk <pavlo.havrylyuk@infineon.com>
2023-07-24 07:59:05 -07:00
source "drivers/counter/Kconfig.ifx_cat1"
drivers: counter: add Andes atcpit100 counter driver atcpit100 counter driver support 4 32-bit PIT channel, using channel 3 as the default counter. Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
2022-08-12 16:36:47 +08:00
source "drivers/counter/Kconfig.andes_atcpit100"
drivers: counter: support NXP S32 System Timer Module NXP S32 System Timer module includes a 32-bit count-up timer and four 32-bit compare channels with a separate interrupt source for each channel. The timer is driven by the module clock divided by an 8-bit prescale value. Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-06 17:46:08 +07:00
source "drivers/counter/Kconfig.nxp_s32"
drivers: counter: add support for GD32 timer Adds support for GD32 timer Note: Currently, it is not supporting RISC-V(GD32V) devices. It needs some work on the interrupt controller first. Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-06-27 01:55:01 +09:00
source "drivers/counter/Kconfig.gd32"
drivers: counter: add snps apb timer adding driver for snps dw timer Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2023-07-18 13:54:10 +00:00
source "drivers/counter/Kconfig.dw"
drivers: counter: Add support for rpi_pico timer Adds support for rpi_pico timer Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-04-21 12:27:36 +09:00
source "drivers/counter/Kconfig.rpi_pico"
drivers: counter: Add MAX32xxx counter driver Common counter driver based on timer for MAX32xxx MCUs To use as wakeup source wakeup-source parameter shall be defined as below &lptimer0 { status = "okay"; clock-source = <ADI_MAX32_PRPH_CLK_SRC_ERTCO>; wakeup-source; counter { status = "okay"; }; }; Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-03-15 12:44:59 +03:00
source "drivers/counter/Kconfig.max32_timer"
drivers: counter: Add MAX32xxx counter RTC driver Common RTC counter driver for MAX32xxx MCUs. Time of day alarm is used to generate interrupt. The resolution of time of day interrupt is 1Hz. Subsecond alarm interrupt not works it does not meet zephyr counter driver requirement, so that not used. To use as wakeup source wakeup-source parameter shall be defined as below &rtc_counter { status = "okay"; wakeup-source; }; Co-authored-by: Okan Sahin <okan.sahin@analog.com> Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-03-18 14:54:25 +03:00
source "drivers/counter/Kconfig.max32_rtc"
drivers: counter: Add NXP MRT driver Add driver for NXP Multirate Timer Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-03 10:34:09 -05:00
source "drivers/counter/Kconfig.nxp_mrt"
drivers: counter: Add AGT counter driver support for Renesas RA8 - boards: renesas: Add support for agt. - drivers: counter: Add support for counter driver use agt - dts: arm: Add support for agt. - dts: bindings: Add support for agt counter driver. - soc: renesas: Add support for agt counter driver. - samples: drivers: counter: alarm: Add support for RA8 This is initial support with only basic functionality for counter operation on Zephyr using AGT hardware, current support for count source is limited to LOCO and PCLKB, other count source like underflow signal external pin or AGTIO from another AGT channel will be added in later support Signed-off-by: Ha Nguyen <ha.nguyen.fz@bp.renesas.com> Signed-off-by: Thao Luong <thao.luong.uw@renesas.com> Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com> Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2024-06-21 11:24:50 +07:00
source "drivers/counter/Kconfig.renesas_ra"
drivers: counter: Initial support for RZ/G3S Add Counter driver support for Renesas RZ/G3S Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com> Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2024-12-16 13:39:15 +07:00
source "drivers/counter/Kconfig.renesas_rz"
drivers: counter: rts5912: add support slow timer counter driver Port rts5912 slow timer counter driver on Zephyr Signed-off-by: Titan Chen <titan.chen@realtek.com>
2025-02-27 10:45:20 +08:00
source "drivers/counter/Kconfig.rts5912_slwtmr"
drivers: counter: rts5912: add support timer32 counter driver Port rts5912 timer32 counter driver on Zephyr Signed-off-by: Titan Chen <titan.chen@realtek.com>
2025-02-27 09:21:06 +08:00
source "drivers/counter/Kconfig.rts5912"
drivers: counter: add NEORV32 GPTMR driver Add counter driver for the NEORV32 General Purpose Timer (GPTMR). Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-04-26 19:22:12 +00:00
source "drivers/counter/Kconfig.neorv32"
drivers: counter: Add MAX32 Wake-Up Timer driver MAX32 Wake-Up Timer is a 32-bit timer that can wakeup the device from low-power modes. Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-01-13 16:41:59 +03:00
source "drivers/counter/Kconfig.max32_wut"
drivers: counter: Add support for cc23x0 RTC counter Add support for cc23x0 RTC driver in counter. RTC is always ON after device boot. Timer is restared only on POR, and is active during STANDBY and ACTIVE power states. Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2024-08-29 12:08:48 +03:00
source "drivers/counter/Kconfig.cc23x0_rtc"
drivers: counter: Add support for cc23x0 LGPT Add support for LGPT0, LGPT1, LGPT2 and LGPT3 to cc23x0 SoC. Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2024-09-11 14:10:23 +03:00
source "drivers/counter/Kconfig.cc23x0_lgpt"
drivers: counter: Add a support for TI MSPM0 Timer counter TI MSPM0 SoC series has General Purpose Timer and Advanced control timers with Counting module, Capture block (measure input signal period/time) and Compare block (to generate time expiry, output waveform like PWM). Add a support for counter driver with alarm and counter top functions. Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-05-08 21:44:58 +05:30
source "drivers/counter/Kconfig.mspm0"
counter: Refactor main Kconfig file This patch refactors the main Kconfig file in order to align it with the Zephyr code style and to make sure that each Kconfig configuration portion is easily identifiable. Change-Id: Iba83be8ae154df4b29ff423b4c3cc97a78c93e00 Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2016-11-29 14:33:36 +00:00
endif # COUNTER
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