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kconfig: Clean up header comments and make them consistent Use this short header style in all Kconfig files: # <description> # <copyright> # <license> ... Also change all <description>s from # Kconfig[.extension] - Foo-related options to just # Foo-related options It's clear enough that it's about Kconfig. The <description> cleanup was done with this command, along with some manual cleanup (big letter at the start, etc.) git ls-files '*Kconfig*' | \ xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /' Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-01 13:45:29 +01:00
# Counter configuration options
API: Add public counter API Add the public API for counter devices and the drivers infrastructure. Origin: Original Change-Id: If100fbc9b3d119ce2be6c131bd64dbeb4fe346f2 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-02-22 17:10:56 -08:00
# Copyright (c) 2016 Intel Corporation
license: Replace Apache boilerplate with SPDX tag Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-18 17:01:01 -08:00
# SPDX-License-Identifier: Apache-2.0
API: Add public counter API Add the public API for counter devices and the drivers infrastructure. Origin: Original Change-Id: If100fbc9b3d119ce2be6c131bd64dbeb4fe346f2 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-02-22 17:10:56 -08:00
menuconfig COUNTER
drivers: kconfig: unify menuconfig title strings Unify the drivers/*/Kconfig menuconfig title strings to the format "<class> [(acronym)] [bus] drivers". Including both the full name of the driver class and an acronym makes menuconfig more user friendly as some of the acronyms are less well-known than others. It also improves Kconfig search, both via menuconfig and via the generated Kconfig documentation. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-27 14:55:23 +02:00
bool "Counter drivers"
API: Add public counter API Add the public API for counter devices and the drivers infrastructure. Origin: Original Change-Id: If100fbc9b3d119ce2be6c131bd64dbeb4fe346f2 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-02-22 17:10:56 -08:00
help
Enable support for counter and timer.
drivers: Quark AON counter and timer support Quark AON counter and timer sub-drivers. They are based on the QMSI drivers. In order to enable this driver, the following options must be set. CONFIG_QMSI_DRIVERS CONFIG_QMSI_INSTALL_PATH CONFIG_COUNTER Origin: Original Change-Id: Idbeabfaef3408f4d645b0e64a337d7f5f0f357c7 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-03-09 12:00:40 -08:00
counter: Refactor main Kconfig file This patch refactors the main Kconfig file in order to align it with the Zephyr code style and to make sure that each Kconfig configuration portion is easily identifiable. Change-Id: Iba83be8ae154df4b29ff423b4c3cc97a78c93e00 Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2016-11-29 14:33:36 +00:00
if COUNTER
drivers: Quark AON counter and timer support Quark AON counter and timer sub-drivers. They are based on the QMSI drivers. In order to enable this driver, the following options must be set. CONFIG_QMSI_DRIVERS CONFIG_QMSI_INSTALL_PATH CONFIG_COUNTER Origin: Original Change-Id: Idbeabfaef3408f4d645b0e64a337d7f5f0f357c7 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
2016-03-09 12:00:40 -08:00
drivers: counter: introduce counter capture api This introduces APIs for input capture. A use case for this would be time stamping a rising and/or falling edge where precision and lack of jitter is important. The only way to currently do this in zephyr is to set up a GPIO interrupt and then read the counter or kernel time... but this can have limitations of software such as the processor may have a lot going on and can be subject to interrupt latencies. Having a hardware 'latch' done of the rising and/or falling edge with respect to a timer can eliminate these imprecisions. How this is to be used, is that an application is to call `capture_callback_set` with the configuration of the channel number, flags (such as falling, rising, or both edges), and then a callback function. Then the `capture_enable` function is to be called to enable this. The callback has the timestamp of the edge in ticks and the edge that it captured (rising or falling). This also adds a 64 bit tick version for the capture callback. Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2026-02-23 23:37:34 -08:00
config COUNTER_CAPTURE
bool "Counter capture"
select EXPERIMENTAL
depends on COUNTER_SUPPORTS_CAPTURE
help
Enable support for counter capture. This is a feature that allows
hardware timestamping of external events as well as a software
interrupt on the event. This feature is not supported by all
counter drivers.
config COUNTER_SUPPORTS_CAPTURE
bool
help
Select this option if the counter driver supports the counter capture
API. This is to be set the driver.
drivers: counter: Refactor drivers to use shared init priority Refactors all of the counter drivers to use a shared driver class initialization priority configuration, CONFIG_COUNTER_INIT_PRIORITY, to allow configuring counter drivers separately from other devices. This is similar to other driver classes like I2C and SPI. The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the existing default initialization priority for most drivers. The exceptions are the maxim_ds3231 and mcp7940n drivers which have a dependency on a SPI driver and must therefore initialize later than the default device priority. Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-10-20 15:15:14 -05:00
config COUNTER_INIT_PRIORITY
int "Counter init priority"
drivers: counter: revert init priority increase Commit bbda65a ("drivers: counter: increase COUNTER_INIT_PRIORITY") raised COUNTER_INIT_PRIORITY from KERNEL_INIT_PRIORITY_DEVICE (50) to 60 to guarantee counter devices initialize before bus-dependent devices sharing the same default priority. Revert to KERNEL_INIT_PRIORITY_DEVICE and remove the BUILD_ASSERT in the RTC counter driver that enforced RTC_INIT_PRIORITY > COUNTER_INIT_PRIORITY, as both now default to the same value with ordering guaranteed by DT sub-priority. Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
2026-07-15 20:18:09 +05:30
default KERNEL_INIT_PRIORITY_DEVICE
drivers: counter: Refactor drivers to use shared init priority Refactors all of the counter drivers to use a shared driver class initialization priority configuration, CONFIG_COUNTER_INIT_PRIORITY, to allow configuring counter drivers separately from other devices. This is similar to other driver classes like I2C and SPI. The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the existing default initialization priority for most drivers. The exceptions are the maxim_ds3231 and mcp7940n drivers which have a dependency on a SPI driver and must therefore initialize later than the default device priority. Signed-off-by: Maureen Helm <maureen.helm@intel.com>
2021-10-20 15:15:14 -05:00
help
Counter driver device initialization priority.
drivers: counter: Add shell commands for timer add shell implementation for timer Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
2023-07-18 14:06:39 +00:00
config COUNTER_SHELL
bool "Counter shell"
depends on SHELL
help
Enable Shell Commands for Counter and Timer
drivers: counter: add kconfig for enabling 64b frequencies Some counters, such as those that use fractional adders, tick at resolutions greater than 4294967295Hz. This changes the freq in the common info to a uint64_t. This adds a KConfig that can be selected by a driver. This also has the counter ticks to sec (and vice versa) helper functions call the get frequency for 64 bits if the kconfig is selected. Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-04-26 00:24:04 -05:00
config COUNTER_64BITS_FREQ
bool
help
Select this option if the counter driver should use 64-bits for frequency.
This is typically set by drivers that have frequencies greater than
4,294,967,295 Hz.
drivers: counter: add kconfig for enabling 64b tick api Add a kconfig to be used as a flag for indicating if it supports 64b ticks and another flag which will enable the 64b api. The kconfig indicating that it supports 64b is a dependency of the kconfig that will enable the api. Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2026-01-12 12:41:58 -08:00
config COUNTER_SUPPORTS_64BITS_TICKS
drivers: counter: add 64bit apis Add apis for 64 bits. Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-11-09 11:33:43 -08:00
bool
help
drivers: counter: add kconfig for enabling 64b tick api Add a kconfig to be used as a flag for indicating if it supports 64b ticks and another flag which will enable the 64b api. The kconfig indicating that it supports 64b is a dependency of the kconfig that will enable the api. Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2026-01-12 12:41:58 -08:00
Select this option if the counter driver supports 64-bits for ticks.
drivers: counter: add 64bit apis Add apis for 64 bits. Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-11-09 11:33:43 -08:00
This is typically set by drivers that require extended
tick ranges beyond the 32-bit limit.
drivers: counter: add kconfig for enabling 64b tick api Add a kconfig to be used as a flag for indicating if it supports 64b ticks and another flag which will enable the 64b api. The kconfig indicating that it supports 64b is a dependency of the kconfig that will enable the api. Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2026-01-12 12:41:58 -08:00
config COUNTER_64BITS_TICKS
bool "API to support ticks longer than 32-bits"
depends on COUNTER_SUPPORTS_64BITS_TICKS
help
This enables APIs to handle ticks larger than 32-bits with a
64-bit typedef. It is up to the driver to implement the necessary
functions to supports.
drivers: counter: add calibration API Add optional set_calibration/get_calibration operations to the counter driver API. Calibration is specified in parts per billion (ppb). The operations are gated behind CONFIG_COUNTER_CALIBRATION and return -ENOSYS if not implemented by the driver. Signed-off-by: Harini T <harini.t@amd.com>
2026-04-21 17:52:27 +05:30
config COUNTER_CALIBRATION
bool "Counter driver calibration support"
help
Enable support for counter clock calibration. Calibration
is specified in parts per billion (ppb). A positive value
speeds up the counter, a negative value slows it down.
drivers: Define COUNTER_LOG_LEVEL using template This commit updates counter Kconfig to use logger template to define COUNTER_LOG_LEVEL option. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-06-11 09:52:36 +02:00
module = COUNTER
module-str = counter
source "subsys/logging/Kconfig.template.log_config"
drivers: counter: Counter API implementation for nRF Series (TIMER). Shim for counter API using nrfx_timer driver. Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2018-06-11 11:50:20 +02:00
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
# zephyr-keep-sorted-start
source "drivers/counter/Kconfig.ace"
drivers: counter: Add Ambiq counter driver This commit adds Ambiq counter driver for Apollo4p SoCs. Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com> Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
2023-08-04 14:47:07 +02:00
source "drivers/counter/Kconfig.ambiq"
drivers: counter: add ameba counter driver Add realtek ameba counter driver. Signed-off-by: minyuan xue <minyuan_xue@realsil.com.cn>
2026-04-01 11:01:45 +08:00
source "drivers/counter/Kconfig.ameba_tmr"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.andes_atcpit100"
drivers: counter: rtc: add Realtek Bee series support Add counter RTC driver support for Realtek Bee series SoCs, including RTL87x2G and RTL8752H. This driver supports: - Basic counter operations - Alarm configuration and callbacks Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
2026-03-10 16:14:20 +08:00
source "drivers/counter/Kconfig.bee_rtc"
drivers: counter: add Realtek Bee series driver Add counter timer driver support for Realtek Bee series SoCs, including RTL87x2G and RTL8752H. This driver is based on the hardware timer and supports: - Relative alarm configuration - Top value configuration Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
2026-02-03 16:35:30 +08:00
source "drivers/counter/Kconfig.bee_timer"
drivers: counter: add Bouffalo Lab timer and rtc drivers Add counter drivers for Bouffalo Lab SoCs: - GP timer driver with 2 alarm channels, configurable clock source, and software cycle tracking for SoCs without hardware counter clear - RTC counter driver exposing the always-on 32 kHz HBN RTC Signed-off-by: William Markezana <william.markezana@gmail.com>
2026-02-22 22:05:14 -05:00
source "drivers/counter/Kconfig.bflb"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.cc23x0_lgpt"
source "drivers/counter/Kconfig.cc23x0_rtc"
source "drivers/counter/Kconfig.cmos"
drivers: counter: add support for ARM CRSAS-MA2 This adds support for ARM Corstone System Architecture Specification Ma2 (ARM CRSAS-MA2) System Counter and System Timer. The HW consists of one 64-byt System Counter, and any number of System Timers that have match registers to generate interrupts based on the value of the System Counter. The timers don't have any counter/timer of their own, meaning that System Counter can't be started or stopped independently if there is an enabled System Timer. Add the crsas-ma2 timer to the test for counters. Signed-off-by: Mike J. Chen <mjchen@google.com> Signed-off-by: Krystian Hebel <khebel@antmicro.com>
2026-01-20 15:56:50 -08:00
source "drivers/counter/Kconfig.crsas_ma2"
counter: cmsdk: Add DualTimer as Counter This patch adds Dualtimer to be used as a counter. Jira: ZEP-1300 Change-Id: Ic4a2d89ec7fc0c0c2a0bc7f6d32d97637049faaf Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2016-12-13 11:53:08 +00:00
source "drivers/counter/Kconfig.dtmr_cmsdk_apb"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.dw"
source "drivers/counter/Kconfig.esp32_rtc"
source "drivers/counter/Kconfig.esp32_tmr"
source "drivers/counter/Kconfig.gd32"
imx: Add IMX EPIT driver for i.MX socs Add shim driver for i.MX EPIT (Enhanced Periodic Interrupt Timer) peripheral which can be used for i.MX6SoloX, i.MX7D and other i.MX socs. Origin: Original Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2018-11-16 16:34:48 +01:00
source "drivers/counter/Kconfig.imx_epit"
drivers: infineon: Drop cat1 from the files names Drop cat1 from the file names to enable reuse by other category devices as well Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-11-25 22:20:02 -08:00
source "drivers/counter/Kconfig.infineon"
source "drivers/counter/Kconfig.infineon_tcpwm"
drivers/counter: implement it51xxx counter driver Implement counter driver for ITE it51xxx series chip. Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2025-05-21 17:52:45 +08:00
source "drivers/counter/Kconfig.ite_it51xxx"
drivers: counter: add ite it8xxx2 timer driver The IT8xxx2 timer driver uses timer 7 and timer 8 to implement the alarm timer and the top timer, respectively. Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
2025-03-20 15:39:30 +08:00
source "drivers/counter/Kconfig.ite_it8xxx2"
drivers: counter: k3_rtc: Add TI RTC driver for K3 This commit adds the counter RTC driver used in TI k3 devices. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
2026-02-13 13:52:29 +05:30
source "drivers/counter/Kconfig.k3_rtc_counter"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.max32_rtc"
source "drivers/counter/Kconfig.max32_timer"
source "drivers/counter/Kconfig.max32_wut"
drivers: counter: microchip: Add TCC G1 driver - Adds support for g1 counter driver with tcc peripheral Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-11-20 16:37:08 +05:30
source "drivers/counter/Kconfig.mchp"
drivers: counter: add support for sama7g54 PIT64B Add driver for sama7g54 PIT64B Use PIT64B as a zephyr counter device Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2025-08-04 18:17:39 +08:00
source "drivers/counter/Kconfig.mchp_sam_pit64b"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.mcp7940n"
source "drivers/counter/Kconfig.mcux_ctimer"
source "drivers/counter/Kconfig.mcux_ftm"
drivers: counter: Add NXP MCUX GPT counter driver Add driver for General Purpose Timer module which can act as a counter. Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-03-21 15:48:45 +01:00
source "drivers/counter/Kconfig.mcux_gpt"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.mcux_lpc_rtc"
source "drivers/counter/Kconfig.mcux_lpit"
source "drivers/counter/Kconfig.mcux_lptmr"
drivers: counter: add driver for NXP QTMR counters The driver is implemented using the MCUXpresso SDK. Signed-off-by: Jan Peters <peters@kt-elektronik.de>
2022-04-29 10:25:12 +02:00
source "drivers/counter/Kconfig.mcux_qtmr"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.mcux_rtc"
source "drivers/counter/Kconfig.mcux_rtc_jdp"
drivers: counter: NXP SNVS rtc: Add support for NXP imx SNVS RTC Adds a driver using the SNVS high power and optionally low power RTC instances. A device specific function `mcux_snvs_rtc_set` is provided to update the current counter value. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-11-15 11:00:07 +01:00
source "drivers/counter/Kconfig.mcux_snvs"
drivers: Counter: STM Support on Zephyr 1.Add nxp,stm.yaml dts bindings 2.Provide counter driver based on FTM driver from mcux-sdk-ng. Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
2025-08-12 18:18:19 +08:00
source "drivers/counter/Kconfig.mcux_stm"
drivers: counter: add NXP MCUX SYS_CTR driver Add a Zephyr counter driver for the NXP MCUXpresso System Counter (SYS_CTR). The driver supports: - 56-bit free-running up-counter - Selectable clock source: 24 MHz base clock or 32 kHz slow clock - Two compare frames (alarm channels) with a shared interrupt - Standard Zephyr counter alarm API Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
2026-03-26 00:33:03 +08:00
source "drivers/counter/Kconfig.mcux_sysctr"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.mcux_tpm"
drivers: counter: add NXP TSTMR counter driver Add a counter driver for the NXP Time Stamp Timer (TSTMR), a 56-bit free-running, read-only up-counter. The driver exposes it through the Zephyr counter API (get_value/get_value_64 and get_freq); start/stop, alarm, and top-value operations are unsupported as the hardware is free-running with no compare or interrupt capability. The frequency is SoC-specific and taken from the clock-frequency devicetree property. A coherent 56-bit read is obtained by sampling the low/high registers twice under an IRQ lock and handling low-word rollover. Add the binding, Kconfig, and build glue. Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-06-29 14:49:25 +08:00
source "drivers/counter/Kconfig.mcux_tstmr"
drivers: counter: add MCUX wake timer driver Add a counter driver for the MCUX wake timer. The hardware is a one-shot down-counter with one load/count register, so the driver uses the register either for periodic top handling or for relative single-shot alarms. Absolute alarms are reported as unsupported because programming an alarm reloads the hardware counter and changes the value space that an absolute target would be measured against. Clear stale pending IRQ state around start, stop, cancel, and alarm setup. Built and ran tests/drivers/counter/counter_basic_api on frdm_mcxa153 with CONFIG_COUNTER_MCUX_WAKE_TIMER_ALARM=y. Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-06-09 16:48:25 +08:00
source "drivers/counter/Kconfig.mcux_wake_timer"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.mspm0"
drivers/counter/counter_native_sim: Rename from counter_native_posix Including renaming the DTS binding and kconfig options deprecating the old one. Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-03-03 13:23:17 +01:00
source "drivers/counter/Kconfig.native_sim"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.neorv32"
source "drivers/counter/Kconfig.npcx"
source "drivers/counter/Kconfig.nrfx"
drivers: counter: add irtc counter driver add irtc counter driver Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-06-17 22:47:42 +08:00
source "drivers/counter/Kconfig.nxp_irtc"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.nxp_mrt"
dts: bindings: renamed binding used for pit Renamed pit binding from nxp,kinetis-pit to nxp,pit Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-02-01 16:12:06 -06:00
source "drivers/counter/Kconfig.nxp_pit"
drivers: counter: support NXP S32 System Timer Module NXP S32 System Timer module includes a 32-bit count-up timer and four 32-bit compare channels with a separate interrupt source for each channel. The timer is driven by the module clock divided by an 8-bit prescale value. Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-06 17:46:08 +07:00
source "drivers/counter/Kconfig.nxp_s32"
drivers: counter: Add AGT counter driver support for Renesas RA8 - boards: renesas: Add support for agt. - drivers: counter: Add support for counter driver use agt - dts: arm: Add support for agt. - dts: bindings: Add support for agt counter driver. - soc: renesas: Add support for agt counter driver. - samples: drivers: counter: alarm: Add support for RA8 This is initial support with only basic functionality for counter operation on Zephyr using AGT hardware, current support for count source is limited to LOCO and PCLKB, other count source like underflow signal external pin or AGTIO from another AGT channel will be added in later support Signed-off-by: Ha Nguyen <ha.nguyen.fz@bp.renesas.com> Signed-off-by: Thao Luong <thao.luong.uw@renesas.com> Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com> Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2024-06-21 11:24:50 +07:00
source "drivers/counter/Kconfig.renesas_ra"
drivers: counter: Initial support for RZ/G3S Add Counter driver support for Renesas RZ/G3S Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com> Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2024-12-16 13:39:15 +07:00
source "drivers/counter/Kconfig.renesas_rz"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.rpi_pico"
drivers: counter: Added RPI Pico PIT counter driver Added a counter driver for the RPI Pico/RP2040 that implements programmable interval timer (PIT) functionality using the PWM HAL. Signed-off-by: Jan Behrens <jan.behrens@navimatix.de>
2025-02-03 09:36:40 +01:00
source "drivers/counter/Kconfig.rpi_pico_pit"
drivers: counter: rts5912: add support timer32 counter driver Port rts5912 timer32 counter driver on Zephyr Signed-off-by: Titan Chen <titan.chen@realtek.com>
2025-02-27 09:21:06 +08:00
source "drivers/counter/Kconfig.rts5912"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.rts5912_slwtmr"
source "drivers/counter/Kconfig.sam"
source "drivers/counter/Kconfig.sam0"
drivers: counter: Add counter driver for BURTC in Silabs s2 and s3 Add support for using BURTC as regular counter, without overriding the sleeptimer. Signed-off-by: Shontal Biton <shontal1005@gmail.com>
2026-02-18 11:31:09 +02:00
source "drivers/counter/Kconfig.silabs"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
source "drivers/counter/Kconfig.smartbond_timer"
source "drivers/counter/Kconfig.stm32_rtc"
source "drivers/counter/Kconfig.stm32_timer"
source "drivers/counter/Kconfig.tmr_cmsdk_apb"
source "drivers/counter/Kconfig.xec"
source "drivers/counter/Kconfig.xlnx"
drivers: counter: Add TTC (Triple Timer Counter) driver The TTC provides three independent hardware counters supporting free-running and interval modes, accessed via MMIO registers. This driver implements the Zephyr counter API, including start/stop, read, alarm, and top value configuration. Alarm events are delivered using match interrupts. Dynamic IRQ connection is used to support platforms where multiple TTC counter instances share the same interrupt line. Each IRQ is registered only once at runtime, and the ISR dispatches pending events to all TTC instances mapped to that interrupt, ensuring correct handling for both shared and dedicated interrupt configurations. Signed-off-by: Satya Sri <satyasri.katru@amd.com>
2026-01-27 16:10:37 +05:30
source "drivers/counter/Kconfig.xlnx_ttc"
drivers: counter: add Xilinx ZynqMP RTC driver Add a counter driver for the Xilinx Zynq Ultrascale+ MPSoC Real Time Clock. The hardware provides a 32-bit seconds counter driven by an external crystal oscillator, one alarm channel, and a calibration register with integer and fractional tick adjustment. The driver implements the Zephyr counter API and is intended to be used with the rtc_counter wrapper to expose the standard RTC API. The RTC oscillator runs continuously so start() and stop() return -ENOTSUP. Calibration support is gated by CONFIG_COUNTER_CALIBRATION. Signed-off-by: Harini T <harini.t@amd.com>
2026-04-22 01:05:14 +05:30
source "drivers/counter/Kconfig.xlnx_zynqmp_rtc"
style: drivers: sort Kconfig and CMake includes Use the "zephyr-keep-sorted-start/stop" comment to have CI check the alphabetical order of includes, to help reducing the chance of conflicts while contributing drivers. Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-15 18:41:36 +00:00
# zephyr-keep-sorted-stop
drivers: counter: npcx: add support for lct counter driver This commit enables configuration and integration of LCT counter by including relevant source and kconfig files. Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-10-16 10:44:21 +08:00
drivers: counter: rv3032c7: Add rv3032 counter driver Expose timer functionality from rv-3032-c7 via counter api. I2C communication and IRQs are arbitrated via MFD parent driver for rtc, sensor and counter at once. Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-10-27 09:41:13 +02:00
source "drivers/counter/Kconfig.rv3032_counter"
counter: Refactor main Kconfig file This patch refactors the main Kconfig file in order to align it with the Zephyr code style and to make sure that each Kconfig configuration portion is easily identifiable. Change-Id: Iba83be8ae154df4b29ff423b4c3cc97a78c93e00 Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2016-11-29 14:33:36 +00:00
endif # COUNTER
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