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zephyr/arch/common/nocache.ld

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arch: port nocache linker code to use Cmake function Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-20 13:04:45 +01:00
/*
* Copyright (c) 2019 Nordic Semiconductor ASA
* Copyright (c) 2019 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/* Copied from linker.ld */
/* Non-cached region of RAM */
arch: common: nocache: fix linker section definition No-cache SRAM section is currently used for ARM-only builds with support for no-cacheable memory sections (i.e. CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT) and it holds uninitialized data. This commit properly defines the corresponding linker section using SECTION_DATA_PROLOGUE and GROUP_DATA_LINK_IN macros. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-19 10:53:47 +02:00
SECTION_DATA_PROLOGUE(_NOCACHE_SECTION_NAME,(NOLOAD),)
arch: port nocache linker code to use Cmake function Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-20 13:04:45 +01:00
{
arm64: add nocache memory segment support In some drivers, noncache memory need to be used for dma coherent memroy, so add nocache memory segment mapping and support for ARM64 platforms. The following variables definition example shows they will use nocache memory allocation: int var1 __nocache; int var2 __attribute__((__section__(".nocache"))); Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-10-15 11:21:32 +02:00
#if defined(CONFIG_MMU)
MMU_ALIGN;
#else
arch: port nocache linker code to use Cmake function Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-20 13:04:45 +01:00
MPU_ALIGN(_nocache_ram_size);
arm64: add nocache memory segment support In some drivers, noncache memory need to be used for dma coherent memroy, so add nocache memory segment mapping and support for ARM64 platforms. The following variables definition example shows they will use nocache memory allocation: int var1 __nocache; int var2 __attribute__((__section__(".nocache"))); Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-10-15 11:21:32 +02:00
#endif
arch: port nocache linker code to use Cmake function Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-20 13:04:45 +01:00
_nocache_ram_start = .;
*(.nocache)
*(".nocache.*")
cmake: Add support to add symbols to nocache section This PR allows the user to add symbols to the nocache section. The use for this could be as follows zephyr_linker_sources_ifdef(CONFIG_NOCACHE_MEMORY NOCACHE_SECTION nocache.ld ) nocache.ld (as shown below) can define additional symbols to go into the nocache section . = ALIGN(4); KEEP(*(NonCacheable)) Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-08-22 18:05:04 +02:00
#include <snippets-nocache-section.ld>
arm64: add nocache memory segment support In some drivers, noncache memory need to be used for dma coherent memroy, so add nocache memory segment mapping and support for ARM64 platforms. The following variables definition example shows they will use nocache memory allocation: int var1 __nocache; int var2 __attribute__((__section__(".nocache"))); Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-10-15 11:21:32 +02:00
#if defined(CONFIG_MMU)
MMU_ALIGN;
#else
arch: port nocache linker code to use Cmake function Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-20 13:04:45 +01:00
MPU_ALIGN(_nocache_ram_size);
arm64: add nocache memory segment support In some drivers, noncache memory need to be used for dma coherent memroy, so add nocache memory segment mapping and support for ARM64 platforms. The following variables definition example shows they will use nocache memory allocation: int var1 __nocache; int var2 __attribute__((__section__(".nocache"))); Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-10-15 11:21:32 +02:00
#endif
arch: port nocache linker code to use Cmake function Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-20 13:04:45 +01:00
_nocache_ram_end = .;
arch: common: nocache: fix linker section definition No-cache SRAM section is currently used for ARM-only builds with support for no-cacheable memory sections (i.e. CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT) and it holds uninitialized data. This commit properly defines the corresponding linker section using SECTION_DATA_PROLOGUE and GROUP_DATA_LINK_IN macros. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-19 10:53:47 +02:00
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
arch: port nocache linker code to use Cmake function Remove from linker.ld Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-03-20 13:04:45 +01:00
_nocache_ram_size = _nocache_ram_end - _nocache_ram_start;
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