2018-04-18 18:26:39 +02:00
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/*
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* Copyright (c) 2018, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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2018-09-15 06:21:56 +02:00
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#include <mem.h>
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2018-04-18 18:26:39 +02:00
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/*
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* Determines the address and size for code memory which will be applied
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* when "zephyr,flash = &flash". Use this to select a custom region,
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* usually within DDR.
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*/
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2018-09-15 06:21:56 +02:00
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#define DT_FLASH_SIZE DT_SIZE_K(512)
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2018-04-18 18:26:39 +02:00
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#define DT_FLASH_ADDR 0x84000000
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/*
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* Determines the address and size for data memory which will be applied
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* when "zephyr,sram = &sram". Use this to select a custom region,
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* usually within DDR.
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*/
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2018-09-15 06:21:56 +02:00
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#define DT_SRAM_SIZE DT_SIZE_K(128)
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2018-04-18 18:26:39 +02:00
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#define DT_SRAM_ADDR 0x84080000
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#include <nxp/nxp_imx6sx_m4.dtsi>
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/ {
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model = "UDOO Neo Full board";
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compatible = "nxp,mcimx6x_m4";
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aliases {
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led0 = &red_led;
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};
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chosen {
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zephyr,flash = &flash;
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zephyr,sram = &tcmu;
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zephyr,console = &uart5;
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2018-11-27 12:11:04 +01:00
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zephyr,shell-uart = &uart5;
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2018-04-18 18:26:39 +02:00
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};
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leds {
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compatible = "gpio-leds";
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2018-10-02 16:36:43 +02:00
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red_led: led_0 {
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2018-09-20 11:57:55 +02:00
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gpios = <&gpio4 6 0>;
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2018-04-18 18:26:39 +02:00
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label = "User LD1";
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};
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};
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};
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&uart5 {
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2019-06-14 19:31:16 +02:00
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status = "okay";
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2018-04-18 18:26:39 +02:00
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current-speed = <115200>;
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modem-mode = <0>;
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};
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&gpio4 {
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2019-06-14 19:31:16 +02:00
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status = "okay";
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2018-04-18 18:26:39 +02:00
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};
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&gpio5 {
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2019-06-14 19:31:16 +02:00
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status = "okay";
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2018-04-18 18:26:39 +02:00
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};
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&gpio6 {
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2019-06-14 19:31:16 +02:00
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status = "okay";
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2018-04-18 18:26:39 +02:00
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};
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2018-06-22 11:25:03 +02:00
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&mub {
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2019-06-14 19:31:16 +02:00
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status = "okay";
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2018-06-22 11:25:03 +02:00
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};
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2018-11-16 16:42:37 +01:00
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&epit1 {
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2019-06-14 19:31:16 +02:00
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status = "okay";
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2018-11-16 16:42:37 +01:00
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};
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&epit2 {
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2019-06-14 19:31:16 +02:00
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status = "okay";
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2018-11-16 16:42:37 +01:00
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};
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