74 lines
1.5 KiB
ArmAsm
74 lines
1.5 KiB
ArmAsm
.include "global.s"
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;; BANKED: checked, imperfect
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.area _BASE
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;; Delay DE milliseconds
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;;
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;; Entry conditions
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;; DE = number of milliseconds to delay (1 to 65536, 0 = 65536)
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;;
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;; Register used: AF, DE
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.CPMS = 4194/4 ; 4.194304 MHz
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.delay:: ; 6 cycles for the CALL
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PUSH BC ; 4 cycles
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CALL .dly ; 12 cycles to return from .dly (6+1+5)
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LD B,#.CPMS/20-2 ; 2 cycles
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; =========
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; 24 cycles
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.ldlp:
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JR 1$ ; 3 cycles
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1$: JR 2$ ; 3 cycles
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2$: JR 3$ ; 3 cycles
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3$: JR 4$ ; 3 cycles
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4$: JR 5$ ; 3 cycles
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5$: DEC B ; 1 cycles
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JP NZ,.ldlp ; 3 cycles (if TRUE: 4 cycles)
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NOP ; 1 cycles
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; =========
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; 20 cycles
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;; Exit in 16 cycles
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POP BC ; 3 cycles
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JR 6$ ; 3 cycles
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6$: JR 7$ ; 3 cycles
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7$: JR 8$ ; 3 cycles
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8$: RET ; 4 cycles
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; =========
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; 16 cycles
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;; Delay all but last millisecond
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.dly:
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DEC DE ; 2 cycles
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LD A,E ; 1 cycles
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OR D ; 1 cycles
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RET Z ; 2 cycles (upon return: 5 cycles)
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LD B,#.CPMS/20-1 ; 2 cycles
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; =========
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; 8 cycles
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.dlp:
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JR 1$ ; 3 cycles
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1$: JR 2$ ; 3 cycles
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2$: JR 3$ ; 3 cycles
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3$: JR 4$ ; 3 cycles
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4$: JR 5$ ; 3 cycles
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5$: DEC B ; 1 cycles
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JP NZ,.dlp ; 3 cycles (if TRUE: 4 cycles)
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NOP ; 1 cycles
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; =========
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; 20 cycles
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;; Exit in 15 cycles
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JR 6$ ; 3 cycles
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6$: JR 7$ ; 3 cycles
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7$: JR 8$ ; 3 cycles
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8$: JR .dly ; 3 cycles
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; =========
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; 12 cycles
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_delay::
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LDA HL,2(SP) ; Skip return address
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LD E,(HL) ; DE = delay
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INC HL
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LD D,(HL)
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CALL .delay
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RET
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