2015-01-10 16:25:06 +01:00
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/*-------------------------------------------------------------------------
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_divulong.c - routine for division of 32 bit unsigned long
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Ecrit par - Jean-Louis Vern . jlvern@writeme.com (1999)
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2015-01-10 16:25:09 +01:00
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This library is free software; you can redistribute it and/or modify it
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under the terms of the GNU Library General Public License as published by the
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2015-01-10 16:25:06 +01:00
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Free Software Foundation; either version 2, or (at your option) any
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later version.
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2015-01-10 16:25:09 +01:00
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This library is distributed in the hope that it will be useful,
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2015-01-10 16:25:06 +01:00
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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2015-01-10 16:25:09 +01:00
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GNU Library General Public License for more details.
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You should have received a copy of the GNU Library General Public License
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2015-01-10 16:25:06 +01:00
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along with this program; if not, write to the Free Software
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Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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2015-01-10 16:25:09 +01:00
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2015-01-10 16:25:06 +01:00
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In other words, you are welcome to use, share and improve this program.
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You are forbidden to forbid anyone else to use, share and improve
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2015-01-10 16:25:09 +01:00
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what you give them. Help stamp out software-hoarding!
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2015-01-10 16:25:06 +01:00
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-------------------------------------------------------------------------*/
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2015-01-10 16:25:09 +01:00
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/* Assembler-functions are provided for:
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mcs51 small
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mcs51 small stack-auto
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*/
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#if !defined(SDCC_USE_XSTACK) && !defined(_SDCC_NO_ASM_LIB_FUNCS)
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# if defined(SDCC_mcs51)
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# if defined(SDCC_MODEL_SMALL)
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# if defined(SDCC_STACK_AUTO)
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# define _DIVULONG_ASM_SMALL_AUTO
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# else
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# define _DIVULONG_ASM_SMALL
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# endif
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# endif
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# endif
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#endif
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#if defined _DIVULONG_ASM_SMALL
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static void
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_divlong_dummy (void) _naked
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{
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_asm
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.globl __divulong
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__divulong:
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#define count r2
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#define a0 dpl
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#define a1 dph
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#define a2 b
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#define a3 r3
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#define reste0 r4
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#define reste1 r5
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#define reste2 r6
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#define reste3 r7
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#if defined(SDCC_NOOVERLAY)
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.area DSEG (DATA)
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#else
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.area OSEG (OVR,DATA)
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#endif
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.globl __divulong_PARM_2
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.globl __divslong_PARM_2
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__divulong_PARM_2:
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__divslong_PARM_2:
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.ds 4
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.area CSEG (CODE)
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#define b0 (__divulong_PARM_2)
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#define b1 (__divulong_PARM_2 + 1)
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#define b2 (__divulong_PARM_2 + 2)
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#define b3 (__divulong_PARM_2 + 3)
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; parameter a comes in a, b, dph, dpl
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mov a3,a ; save parameter a3
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mov count,#32
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clr a
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mov reste0,a
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mov reste1,a
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mov reste2,a
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mov reste3,a
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; optimization loop in lp0 until the first bit is shifted into rest
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lp0: mov a,a0 ; a <<= 1
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add a,a0
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mov a0,a
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mov a,a1
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rlc a
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mov a1,a
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mov a,a2
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rlc a
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mov a2,a
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mov a,a3
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rlc a
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mov a3,a
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jc in_lp
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djnz count,lp0
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sjmp exit
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loop: mov a,a0 ; a <<= 1
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add a,a0
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mov a0,a
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mov a,a1
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rlc a
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mov a1,a
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mov a,a2
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rlc a
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mov a2,a
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mov a,a3
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rlc a
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mov a3,a
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in_lp: mov a,reste0 ; reste <<= 1
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rlc a ; feed in carry
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mov reste0,a
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mov a,reste1
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rlc a
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mov reste1,a
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mov a,reste2
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rlc a
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mov reste2,a
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mov a,reste3
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rlc a
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mov reste3,a
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mov a,reste0 ; reste - b
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subb a,b0 ; carry is always clear here, because
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; reste <<= 1 never overflows
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mov a,reste1
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subb a,b1
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mov a,reste2
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subb a,b2
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mov a,reste3
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subb a,b3
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jc minus ; reste >= b?
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; -> yes; reste -= b;
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mov a,reste0
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subb a,b0 ; carry is always clear here (jc)
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mov reste0,a
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mov a,reste1
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subb a,b1
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mov reste1,a
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mov a,reste2
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subb a,b2
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mov reste2,a
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mov a,reste3
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subb a,b3
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mov reste3,a
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orl a0,#1
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minus: djnz count,loop ; -> no
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exit: mov a,a3 ; prepare the return value
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ret
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_endasm ;
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}
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#elif defined _DIVULONG_ASM_SMALL_AUTO
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2015-01-10 16:25:06 +01:00
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2015-01-10 16:25:09 +01:00
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static void
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_divlong_dummy (void) _naked
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2015-01-10 16:25:06 +01:00
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{
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2015-01-10 16:25:09 +01:00
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_asm
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.globl __divulong
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__divulong:
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#define count r2
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#define a0 dpl
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#define a1 dph
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#define a2 b
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#define a3 r3
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#define reste0 r4
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#define reste1 r5
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#define reste2 r6
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#define reste3 r7
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.globl __divlong ; entry point for __divslong
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#define b0 r1
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ar0 = 0 ; BUG register set is not considered
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ar1 = 1
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; parameter a comes in a, b, dph, dpl
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mov a3,a ; save parameter a3
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mov a,sp
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add a,#-2-3 ; 2 bytes return address, 3 bytes param b
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mov r0,a ; r0 points to b0
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__divlong: ; entry point for __divslong
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mov ar1,@r0 ; load b0
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inc r0 ; r0 points to b1
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mov count,#32
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clr a
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mov reste0,a
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mov reste1,a
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mov reste2,a
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mov reste3,a
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; optimization loop in lp0 until the first bit is shifted into rest
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lp0: mov a,a0 ; a <<= 1
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add a,a0
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mov a0,a
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mov a,a1
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rlc a
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mov a1,a
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mov a,a2
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rlc a
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mov a2,a
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mov a,a3
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rlc a
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mov a3,a
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jc in_lp
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djnz count,lp0
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sjmp exit
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loop: mov a,a0 ; a <<= 1
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add a,a0
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mov a0,a
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mov a,a1
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rlc a
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mov a1,a
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mov a,a2
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rlc a
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mov a2,a
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mov a,a3
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rlc a
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mov a3,a
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in_lp: mov a,reste0 ; reste <<= 1
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rlc a ; feed in carry
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mov reste0,a
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mov a,reste1
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rlc a
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mov reste1,a
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mov a,reste2
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rlc a
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mov reste2,a
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mov a,reste3
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rlc a
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mov reste3,a
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mov a,reste0 ; reste - b
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subb a,b0 ; carry is always clear here, because
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; reste <<= 1 never overflows
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mov a,reste1
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subb a,@r0 ; b1
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mov a,reste2
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inc r0
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subb a,@r0 ; b2
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mov a,reste3
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inc r0
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subb a,@r0 ; b3
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dec r0
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dec r0
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jc minus ; reste >= b?
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; -> yes; reste -= b;
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mov a,reste0
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subb a,b0 ; carry is always clear here (jc)
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mov reste0,a
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mov a,reste1
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subb a,@r0 ; b1
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mov reste1,a
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mov a,reste2
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inc r0
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subb a,@r0 ; b2
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mov reste2,a
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mov a,reste3
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inc r0
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subb a,@r0 ; b3
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mov reste3,a
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dec r0
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dec r0
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orl a0,#1
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minus: djnz count,loop ; -> no
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exit: mov a,a3 ; prepare the return value
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ret
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_endasm ;
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2015-01-10 16:25:06 +01:00
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}
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#else // _DIVULONG_ASM
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#define MSB_SET(x) ((x >> (8*sizeof(x)-1)) & 1)
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unsigned long
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_divulong (unsigned long a, unsigned long b)
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{
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unsigned long reste = 0L;
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unsigned char count = 32;
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#if defined(SDCC_STACK_AUTO) || defined(SDCC_z80)
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char c;
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#else
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bit c;
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#endif
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do
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{
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// reste: a <- 0;
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c = MSB_SET(a);
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a <<= 1;
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reste <<= 1;
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if (c)
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reste |= 1L;
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if (reste >= b)
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{
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reste -= b;
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// a <- (result = 1)
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a |= 1L;
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}
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}
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while (--count);
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return a;
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}
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#endif // _DIVULONG_ASM
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